News

Mobiveil Announces Launch of PCI Express® 5 Controller IP

Milpitas, CA-April 23, 2019

Mobiveil, Inc., a fast-growing supplier of silicon IP, design platforms, and design services, has announced the PCI Express® 5.0 controller IP. Mobiveil's PCIe® 5.0 architecture IP supports end-to-end data path protection, providing high transfer speeds as well as the flexibility essential for network, storage, server, AI, telecom, consumer, IOT and other applications. It provides functional configuration, reliability and maintainability.

PCI Express IP, along with RapidIO, NVM Express, DDR controllers, flash memory controllers, and LDPC (Error Correction Code) IP, makes up Mobiveil's portfolio of high-speed controller IPs.

Mobiveil CEO Ravi Thummarukudy said, "Our previous version of GPEX PCI Express IP has been widely adopted in many market products. We have leveraged this experience to bring PCIe 5.0 architecture IP to many advanced areas. We want to offer our IP products that have been seamlessly developed and operated with all major PHY and VIP vendors. The proliferation of SSD drives for data center servers and client applications has led to a PCI Express interface. Expectations have increased dramatically. The PCI Express 5.0 specification makes it available for processors that require even faster throughput. "

PCI Express 5.0 Specification Protocol Interface

Mobiveil's new controller IP achieves a full bit rate of 32 Gbps per lane and is backward compatible with PCIe versions 4.0, 3.1, 2.0, and 1.1. Mobiveil offers all kinds of PCI Express, including root complexes, endpoints, dual modes, and switch configurations. The Mobiveil PCI Express controller also provides an AXI interface for easy integration into your SoC design. In addition, the controller has interface interoperability with a wide variety of PHYs available from third parties. The controller supports x1, x2, x4, x8, x16 and supports PIPE (PHY Interface for PCI Express) 8-bit, 16-bit, 32-bit, and 64-bit. The PCIe 5.0 controller supports SR-IOV (single route I / O virtualization), ARI (alternative routing interpretation), and address translation services.

Mobiveil's PCIe 5.0 controller architecture optimizes link utilization, latency, reliability, power consumption, and silicon area. The controller handles PCI Express ordering rules and supports multiple VCs and associated flow control in both directions. The packet-oriented user logic interface also supports PIPE 5.0 compliant PHY, flexible lane ordering, and support for lane inversion.

Chris Browy, vice president of Avery Design Systems, a provider of System Verilog / UVM verification solutions, said, "Mobiveil and Avery are long-term partners in silicon IP and VIP, the highest standards and highest through collaboration in the design and verification process. We are proud to be able to provide our customers with reliable, pre-verified IP solutions and contribute to the rapid adoption of the next generation PCIe 5.0 standard. "

About Mobiveil, Inc.

Mobiveil is a fast-growing high-tech provider of silicon IP, platforms and solutions for the storage, network and consumer / IoT markets. For more information, please visit https://www.tokyonanofarm.com/mobiveil.